GHSA-WGHV-7VWX-FC47
Vulnerability from github – Published: 2026-10-23 15:31 – Updated: 2026-10-23 15:31In the Linux kernel, the following vulnerability has been resolved:
drm/xe: harden adjust_idledly() against divide-by-zero and overflow
adjust_idledly() has several corner-case issues flagged during review:
-
If xe_gt_clock_init() failed to recognise the crystal clock, gt->info.timestamp_base is 0, which makes idledly_units_ps also 0. The subsequent DIV_ROUND_CLOSEST(..., idledly_units_ps) is then a divide-by-zero and panics the kernel.
-
The tick-to-ns conversions are done in u32: idledly * idledly_units_ps, (maxcnt - 1) * 1000 Both overflow u32 before DIV_ROUND_CLOSEST() sees them.
-
If IDLE_WAIT_TIME reads back as 0, maxcnt evaluates to 0 and the maxcnt - 1 clamp wraps to 0xFFFFFFFF in u32.
-
The register only stores whole ticks, so the clamped ns value has to be converted to ticks and back. DIV_ROUND_CLOSEST() can round that conversion up past maxcnt:
maxcnt = 640 ns, one tick = 666664 ps
clamp: maxcnt - 1 = 639 ns ns -> ticks: 639000 / 666664 = 0.958 -> rounds to 1 tick tick -> ns: 1 * 666664 / 1000 = 667 ns
667 ns is programmed into RING_IDLEDLY, but 667 >= maxcnt (640), so xe_gt_WARN_ON() fires again on every subsequent init.
Return early if timestamp_base is 0 (the unknown-crystal path). Do the conversions in u64 via the *_ULL() helpers so they cannot wrap. Clamp with a floor (DIV_ROUND_DOWN_ULL) so the programmed delay stays strictly below maxcnt, and guard the maxcnt == 0 case with a zero delay while still writing RING_IDLEDLY so INHIBIT_SWITCH_UNTIL_PREEMPTED is cleared.
v2: Drop the redundant warn on the timestamp_base == 0 path; xe_gt_clock_init() already warns on an unrecognised crystal clock. Keep the early return to avoid the divide-by-zero. - Vinay
v3: Field-mask the RING_IDLEDLY write with REG_FIELD_PREP(IDLE_DELAY, ...) instead of writing the raw tick count, which could clobber INHIBIT_SWITCH_UNTIL_PREEMPTED and reserved bits. Split the inhibit-switch clear from the maxcnt clamp so a set inhibit bit no longer forces a needless delay overwrite when the delay itself is already valid. Use gt_to_xe(gt) instead of gt_to_xe(hwe->gt).
(cherry picked from commit d864065ea25e9d12897c175de9176ce46677e176)
{
"affected": [],
"aliases": [
"CVE-2026-98919"
],
"database_specific": {
"cwe_ids": [],
"github_reviewed": false,
"github_reviewed_at": null,
"nvd_published_at": "2026-10-23T13:17:12Z",
"severity": null
},
"details": "In the Linux kernel, the following vulnerability has been resolved:\n\ndrm/xe: harden adjust_idledly() against divide-by-zero and overflow\n\nadjust_idledly() has several corner-case issues flagged during review:\n\n 1. If xe_gt_clock_init() failed to recognise the crystal clock,\n gt-\u003einfo.timestamp_base is 0, which makes idledly_units_ps also 0.\n The subsequent DIV_ROUND_CLOSEST(..., idledly_units_ps) is then a\n divide-by-zero and panics the kernel.\n\n 2. The tick-to-ns conversions are done in u32:\n idledly * idledly_units_ps, (maxcnt - 1) * 1000\n Both overflow u32 before DIV_ROUND_CLOSEST() sees them.\n\n 3. If IDLE_WAIT_TIME reads back as 0, maxcnt evaluates to 0 and\n the maxcnt - 1 clamp wraps to 0xFFFFFFFF in u32.\n\n 4. The register only stores whole ticks, so the clamped ns value has\n to be converted to ticks and back. DIV_ROUND_CLOSEST() can round\n that conversion up past maxcnt:\n\n maxcnt = 640 ns, one tick = 666664 ps\n\n clamp: maxcnt - 1 = 639 ns\n ns -\u003e ticks: 639000 / 666664 = 0.958 -\u003e rounds to 1 tick\n tick -\u003e ns: 1 * 666664 / 1000 = 667 ns\n\n 667 ns is programmed into RING_IDLEDLY, but 667 \u003e= maxcnt (640),\n so xe_gt_WARN_ON() fires again on every subsequent init.\n\nReturn early if timestamp_base is 0 (the unknown-crystal path).\nDo the conversions in u64 via the *_ULL() helpers so they cannot wrap.\nClamp with a floor (DIV_ROUND_DOWN_ULL) so the programmed delay stays\nstrictly below maxcnt, and guard the maxcnt == 0 case with a zero delay\nwhile still writing RING_IDLEDLY so INHIBIT_SWITCH_UNTIL_PREEMPTED is\ncleared.\n\nv2: Drop the redundant warn on the timestamp_base == 0 path;\n xe_gt_clock_init() already warns on an unrecognised crystal clock.\n Keep the early return to avoid the divide-by-zero. - Vinay\n\nv3: Field-mask the RING_IDLEDLY write with REG_FIELD_PREP(IDLE_DELAY, ...)\n instead of writing the raw tick count, which could clobber\n INHIBIT_SWITCH_UNTIL_PREEMPTED and reserved bits. Split the\n inhibit-switch clear from the maxcnt clamp so a set inhibit bit no\n longer forces a needless delay overwrite when the delay itself is\n already valid. Use gt_to_xe(gt) instead of gt_to_xe(hwe-\u003egt).\n\n(cherry picked from commit d864065ea25e9d12897c175de9176ce46677e176)",
"id": "GHSA-wghv-7vwx-fc47",
"modified": "2026-10-23T15:31:30Z",
"published": "2026-10-23T15:31:30Z",
"references": [
{
"type": "ADVISORY",
"url": "https://nvd.nist.gov/vuln/detail/CVE-2026-98919"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/2bcbfc5e7bfa9cc76818c54db698da5bdc13d9ff"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/531d4cd03118224022dc21ae25af052ce2a9e267"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/90f467577ebc28c5bc4ba2f0f1b83a4419fb0740"
}
],
"schema_version": "1.4.0",
"severity": []
}
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