Vulnerability-Lookup

GHSA-R646-7CF5-PGJC

Vulnerability from github – Published: 2026-08-28 09:31 – Updated: 2026-08-29 09:30

Details

In the Linux kernel, the following vulnerability has been resolved:

riscv/mm: use physical alignment for vmemmap_start_pfn

RISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to VMEMMAP_ADDR_ALIGN. That alignment must therefore be expressed in the physical-address domain.

Commit 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size") attempted to account for the maximal folio alignment by feeding MAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN. However, MAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage, whereas VMEMMAP_ADDR_ALIGN is used to align a physical address.

The mask-based compound_info encoding requires pfn_to_page(0) to be naturally aligned to MAX_FOLIO_VMEMMAP_ALIGN. Commit 9f94db4c7eaa ("mm/sparse: check memmap alignment for compound_info_has_mask()") added a check for that requirement and exposed the unit mismatch on systems such as QEMU virt, where the DRAM base is not aligned to MAX_FOLIO_NR_PAGES * PAGE_SIZE.

Here is the log: [ 0.000000][ C0] ------------[ cut here ]------------ [ 0.000000][ C0] WARNING: mm/sparse.c:365 at sparse_init+0x58a/0x6fe, CPU#0: swapper/0 [ 0.000000][ C0] Modules linked in: [ 0.000000][ C0] CPU: 0 UID: 0 PID: 0 Comm: swapper Not tainted 7.2.0-rc3-g1d8304bdd65f #2 PREEMPT [ 0.000000][ C0] Hardware name: riscv-virtio,qemu (DT) [ 0.000000][ C0] epc : sparse_init+0x58a/0x6fe [ 0.000000][ C0] ra : sparse_init+0x58a/0x6fe [ 0.000000][ C0] epc : ffffffff86851c88 ra : ffffffff86851c88 sp : ffffffff88807a30 [ 0.000000][ C0] gp : ffffffff8a3bf240 tp : ffffffff88842080 t0 : ff600000ffab6000 [ 0.000000][ C0] t1 : 000000017fab6000 t2 : 65203a6573726363 s0 : ffffffff88807bc0 [ 0.000000][ C0] s1 : 000000000e000000 a0 : 0000000000000007 a1 : 0000000000000000 [ 0.000000][ C0] a2 : 0000000000000002 a3 : ffffffff86851c88 a4 : 0000000000000000 [ 0.000000][ C0] a5 : ffffffff88843080 a6 : 0000000000000003 a7 : 0000000000000000 [ 0.000000][ C0] s2 : ff60000000000000 s3 : 0040000000000000 s4 : 0004000000000000 [ 0.000000][ C0] s5 : ffffffff8a4d92e0 s6 : ff600000ffab55e0 s7 : ffffffff88384d00 [ 0.000000][ C0] s8 : 0000000000000003 s9 : ffffffff88384cc1 s10: ffffffff88384cc0 [ 0.000000][ C0] s11: ffffffff8a4daae0 t3 : ffffffff915e8b20 t4 : ffffffff915e8b20 [ 0.000000][ C0] t5 : ffffffff915e8b20 t6 : ffffffff915e8bc8 ssp : 0000000000000000 [ 0.000000][ C0] status: 0000000200000100 badaddr: ffffffff86851c88 cause: 0000000000000003 [ 0.000000][ C0] [] sparse_init+0x58a/0x6fe [ 0.000000][ C0] [] mm_core_init_early+0x116/0x1e30 [ 0.000000][ C0] [] start_kernel+0xd2/0x848

Convert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment before using it in VMEMMAP_ADDR_ALIGN. This keeps the existing round_down() logic while making the resulting vmemmap base satisfy the mask-alignment requirement.

Severity

7.8 (High)


                  
                    CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H

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{
  "affected": [],
  "aliases": [
    "CVE-2026-80682"
  ],
  "database_specific": {
    "cwe_ids": [],
    "github_reviewed": false,
    "github_reviewed_at": null,
    "nvd_published_at": "2026-08-28T08:16:53Z",
    "severity": "HIGH"
  },
  "details": "In the Linux kernel, the following vulnerability has been resolved:\n\nriscv/mm: use physical alignment for vmemmap_start_pfn\n\nRISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to\nVMEMMAP_ADDR_ALIGN.  That alignment must therefore be expressed in the\nphysical-address domain.\n\nCommit 476849b0fba4 (\"riscv/mm: align vmemmap to maximal folio size\")\nattempted to account for the maximal folio alignment by feeding\nMAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN.  However,\nMAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage,\nwhereas VMEMMAP_ADDR_ALIGN is used to align a physical address.\n\nThe mask-based compound_info encoding requires pfn_to_page(0) to be\nnaturally aligned to MAX_FOLIO_VMEMMAP_ALIGN.  Commit 9f94db4c7eaa\n(\"mm/sparse: check memmap alignment for compound_info_has_mask()\") added a\ncheck for that requirement and exposed the unit mismatch on systems such\nas QEMU virt, where the DRAM base is not aligned to MAX_FOLIO_NR_PAGES *\nPAGE_SIZE.\n\nHere is the log:\n[    0.000000][    C0] ------------[ cut here ]------------\n[    0.000000][    C0] WARNING: mm/sparse.c:365 at sparse_init+0x58a/0x6fe, CPU#0: swapper/0\n[    0.000000][    C0] Modules linked in:\n[    0.000000][    C0] CPU: 0 UID: 0 PID: 0 Comm: swapper Not tainted 7.2.0-rc3-g1d8304bdd65f #2 PREEMPT \n[    0.000000][    C0] Hardware name: riscv-virtio,qemu (DT)\n[    0.000000][    C0] epc : sparse_init+0x58a/0x6fe\n[    0.000000][    C0]  ra : sparse_init+0x58a/0x6fe\n[    0.000000][    C0] epc : ffffffff86851c88 ra : ffffffff86851c88 sp : ffffffff88807a30\n[    0.000000][    C0]  gp : ffffffff8a3bf240 tp : ffffffff88842080 t0 : ff600000ffab6000\n[    0.000000][    C0]  t1 : 000000017fab6000 t2 : 65203a6573726363 s0 : ffffffff88807bc0\n[    0.000000][    C0]  s1 : 000000000e000000 a0 : 0000000000000007 a1 : 0000000000000000\n[    0.000000][    C0]  a2 : 0000000000000002 a3 : ffffffff86851c88 a4 : 0000000000000000\n[    0.000000][    C0]  a5 : ffffffff88843080 a6 : 0000000000000003 a7 : 0000000000000000\n[    0.000000][    C0]  s2 : ff60000000000000 s3 : 0040000000000000 s4 : 0004000000000000\n[    0.000000][    C0]  s5 : ffffffff8a4d92e0 s6 : ff600000ffab55e0 s7 : ffffffff88384d00\n[    0.000000][    C0]  s8 : 0000000000000003 s9 : ffffffff88384cc1 s10: ffffffff88384cc0\n[    0.000000][    C0]  s11: ffffffff8a4daae0 t3 : ffffffff915e8b20 t4 : ffffffff915e8b20\n[    0.000000][    C0]  t5 : ffffffff915e8b20 t6 : ffffffff915e8bc8 ssp : 0000000000000000\n[    0.000000][    C0] status: 0000000200000100 badaddr: ffffffff86851c88 cause: 0000000000000003\n[    0.000000][    C0] [\u003cffffffff86851c88\u003e] sparse_init+0x58a/0x6fe\n[    0.000000][    C0] [\u003cffffffff8683d396\u003e] mm_core_init_early+0x116/0x1e30\n[    0.000000][    C0] [\u003cffffffff86801edc\u003e] start_kernel+0xd2/0x848\n\nConvert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment\nbefore using it in VMEMMAP_ADDR_ALIGN.  This keeps the existing\nround_down() logic while making the resulting vmemmap base satisfy the\nmask-alignment requirement.",
  "id": "GHSA-r646-7cf5-pgjc",
  "modified": "2026-08-29T09:30:28Z",
  "published": "2026-08-28T09:31:49Z",
  "references": [
    {
      "type": "ADVISORY",
      "url": "https://nvd.nist.gov/vuln/detail/CVE-2026-80682"
    },
    {
      "type": "WEB",
      "url": "https://git.kernel.org/stable/c/11ad86830a78ea4e1942afc73c10e4ca8e69e03f"
    },
    {
      "type": "WEB",
      "url": "https://git.kernel.org/stable/c/45ebe4540817cb540a59e4dc04014ac5dddc9990"
    }
  ],
  "schema_version": "1.4.0",
  "severity": [
    {
      "score": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H",
      "type": "CVSS_V3"
    }
  ]
}

CVE-2026-80682 (GCVE-0-2026-80682)

Vulnerability from cvelistv5 – Published: 2026-08-28 06:52 – Updated: 2026-08-29 06:22

Title

riscv/mm: use physical alignment for vmemmap_start_pfn

Summary

In the Linux kernel, the following vulnerability has been resolved: riscv/mm: use physical alignment for vmemmap_start_pfn RISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to VMEMMAP_ADDR_ALIGN. That alignment must therefore be expressed in the physical-address domain. Commit 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size") attempted to account for the maximal folio alignment by feeding MAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN. However, MAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage, whereas VMEMMAP_ADDR_ALIGN is used to align a physical address. The mask-based compound_info encoding requires pfn_to_page(0) to be naturally aligned to MAX_FOLIO_VMEMMAP_ALIGN. Commit 9f94db4c7eaa ("mm/sparse: check memmap alignment for compound_info_has_mask()") added a check for that requirement and exposed the unit mismatch on systems such as QEMU virt, where the DRAM base is not aligned to MAX_FOLIO_NR_PAGES * PAGE_SIZE. Here is the log: [ 0.000000][ C0] ------------[ cut here ]------------ [ 0.000000][ C0] WARNING: mm/sparse.c:365 at sparse_init+0x58a/0x6fe, CPU#0: swapper/0 [ 0.000000][ C0] Modules linked in: [ 0.000000][ C0] CPU: 0 UID: 0 PID: 0 Comm: swapper Not tainted 7.2.0-rc3-g1d8304bdd65f #2 PREEMPT [ 0.000000][ C0] Hardware name: riscv-virtio,qemu (DT) [ 0.000000][ C0] epc : sparse_init+0x58a/0x6fe [ 0.000000][ C0] ra : sparse_init+0x58a/0x6fe [ 0.000000][ C0] epc : ffffffff86851c88 ra : ffffffff86851c88 sp : ffffffff88807a30 [ 0.000000][ C0] gp : ffffffff8a3bf240 tp : ffffffff88842080 t0 : ff600000ffab6000 [ 0.000000][ C0] t1 : 000000017fab6000 t2 : 65203a6573726363 s0 : ffffffff88807bc0 [ 0.000000][ C0] s1 : 000000000e000000 a0 : 0000000000000007 a1 : 0000000000000000 [ 0.000000][ C0] a2 : 0000000000000002 a3 : ffffffff86851c88 a4 : 0000000000000000 [ 0.000000][ C0] a5 : ffffffff88843080 a6 : 0000000000000003 a7 : 0000000000000000 [ 0.000000][ C0] s2 : ff60000000000000 s3 : 0040000000000000 s4 : 0004000000000000 [ 0.000000][ C0] s5 : ffffffff8a4d92e0 s6 : ff600000ffab55e0 s7 : ffffffff88384d00 [ 0.000000][ C0] s8 : 0000000000000003 s9 : ffffffff88384cc1 s10: ffffffff88384cc0 [ 0.000000][ C0] s11: ffffffff8a4daae0 t3 : ffffffff915e8b20 t4 : ffffffff915e8b20 [ 0.000000][ C0] t5 : ffffffff915e8b20 t6 : ffffffff915e8bc8 ssp : 0000000000000000 [ 0.000000][ C0] status: 0000000200000100 badaddr: ffffffff86851c88 cause: 0000000000000003 [ 0.000000][ C0] [<ffffffff86851c88>] sparse_init+0x58a/0x6fe [ 0.000000][ C0] [<ffffffff8683d396>] mm_core_init_early+0x116/0x1e30 [ 0.000000][ C0] [<ffffffff86801edc>] start_kernel+0xd2/0x848 Convert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment before using it in VMEMMAP_ADDR_ALIGN. This keeps the existing round_down() logic while making the resulting vmemmap base satisfy the mask-alignment requirement.

Severity

7.8 (High)


                        
                          CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H

Assigner

Linux mitre root

References

2 references

URL	Tags
https://git.kernel.org/stable/c/11ad86830a78ea4e1…
https://git.kernel.org/stable/c/45ebe4540817cb540…

Impacted products

2 products

Vendor	Product	Version
Linux	Linux	Affected: 476849b0fba4450f5adf22196bcff9c24c673bc4 , < 11ad86830a78ea4e1942afc73c10e4ca8e69e03f (git) Affected: 476849b0fba4450f5adf22196bcff9c24c673bc4 , < 45ebe4540817cb540a59e4dc04014ac5dddc9990 (git)
Linux	Linux	Affected: 7.1 Unaffected: 0 , < 7.1 (semver) Unaffected: 7.1.8 , ≤ 7.1.* (semver) Unaffected: 7.2 , ≤ * (original_commit_for_fix)

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{
  "containers": {
    "cna": {
      "affected": [
        {
          "defaultStatus": "unaffected",
          "product": "Linux",
          "programFiles": [
            "arch/riscv/mm/init.c"
          ],
          "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
          "vendor": "Linux",
          "versions": [
            {
              "lessThan": "11ad86830a78ea4e1942afc73c10e4ca8e69e03f",
              "status": "affected",
              "version": "476849b0fba4450f5adf22196bcff9c24c673bc4",
              "versionType": "git"
            },
            {
              "lessThan": "45ebe4540817cb540a59e4dc04014ac5dddc9990",
              "status": "affected",
              "version": "476849b0fba4450f5adf22196bcff9c24c673bc4",
              "versionType": "git"
            }
          ]
        },
        {
          "defaultStatus": "affected",
          "product": "Linux",
          "programFiles": [
            "arch/riscv/mm/init.c"
          ],
          "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
          "vendor": "Linux",
          "versions": [
            {
              "status": "affected",
              "version": "7.1"
            },
            {
              "lessThan": "7.1",
              "status": "unaffected",
              "version": "0",
              "versionType": "semver"
            },
            {
              "lessThanOrEqual": "7.1.*",
              "status": "unaffected",
              "version": "7.1.8",
              "versionType": "semver"
            },
            {
              "lessThanOrEqual": "*",
              "status": "unaffected",
              "version": "7.2",
              "versionType": "original_commit_for_fix"
            }
          ]
        }
      ],
      "cpeApplicability": [
        {
          "nodes": [
            {
              "cpeMatch": [
                {
                  "criteria": "cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*",
                  "versionEndExcluding": "7.1.8",
                  "versionStartIncluding": "7.1",
                  "vulnerable": true
                },
                {
                  "criteria": "cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*",
                  "versionEndExcluding": "7.2",
                  "versionStartIncluding": "7.1",
                  "vulnerable": true
                }
              ],
              "negate": false,
              "operator": "OR"
            }
          ]
        }
      ],
      "descriptions": [
        {
          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nriscv/mm: use physical alignment for vmemmap_start_pfn\n\nRISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to\nVMEMMAP_ADDR_ALIGN.  That alignment must therefore be expressed in the\nphysical-address domain.\n\nCommit 476849b0fba4 (\"riscv/mm: align vmemmap to maximal folio size\")\nattempted to account for the maximal folio alignment by feeding\nMAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN.  However,\nMAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage,\nwhereas VMEMMAP_ADDR_ALIGN is used to align a physical address.\n\nThe mask-based compound_info encoding requires pfn_to_page(0) to be\nnaturally aligned to MAX_FOLIO_VMEMMAP_ALIGN.  Commit 9f94db4c7eaa\n(\"mm/sparse: check memmap alignment for compound_info_has_mask()\") added a\ncheck for that requirement and exposed the unit mismatch on systems such\nas QEMU virt, where the DRAM base is not aligned to MAX_FOLIO_NR_PAGES *\nPAGE_SIZE.\n\nHere is the log:\n[    0.000000][    C0] ------------[ cut here ]------------\n[    0.000000][    C0] WARNING: mm/sparse.c:365 at sparse_init+0x58a/0x6fe, CPU#0: swapper/0\n[    0.000000][    C0] Modules linked in:\n[    0.000000][    C0] CPU: 0 UID: 0 PID: 0 Comm: swapper Not tainted 7.2.0-rc3-g1d8304bdd65f #2 PREEMPT \n[    0.000000][    C0] Hardware name: riscv-virtio,qemu (DT)\n[    0.000000][    C0] epc : sparse_init+0x58a/0x6fe\n[    0.000000][    C0]  ra : sparse_init+0x58a/0x6fe\n[    0.000000][    C0] epc : ffffffff86851c88 ra : ffffffff86851c88 sp : ffffffff88807a30\n[    0.000000][    C0]  gp : ffffffff8a3bf240 tp : ffffffff88842080 t0 : ff600000ffab6000\n[    0.000000][    C0]  t1 : 000000017fab6000 t2 : 65203a6573726363 s0 : ffffffff88807bc0\n[    0.000000][    C0]  s1 : 000000000e000000 a0 : 0000000000000007 a1 : 0000000000000000\n[    0.000000][    C0]  a2 : 0000000000000002 a3 : ffffffff86851c88 a4 : 0000000000000000\n[    0.000000][    C0]  a5 : ffffffff88843080 a6 : 0000000000000003 a7 : 0000000000000000\n[    0.000000][    C0]  s2 : ff60000000000000 s3 : 0040000000000000 s4 : 0004000000000000\n[    0.000000][    C0]  s5 : ffffffff8a4d92e0 s6 : ff600000ffab55e0 s7 : ffffffff88384d00\n[    0.000000][    C0]  s8 : 0000000000000003 s9 : ffffffff88384cc1 s10: ffffffff88384cc0\n[    0.000000][    C0]  s11: ffffffff8a4daae0 t3 : ffffffff915e8b20 t4 : ffffffff915e8b20\n[    0.000000][    C0]  t5 : ffffffff915e8b20 t6 : ffffffff915e8bc8 ssp : 0000000000000000\n[    0.000000][    C0] status: 0000000200000100 badaddr: ffffffff86851c88 cause: 0000000000000003\n[    0.000000][    C0] [\u003cffffffff86851c88\u003e] sparse_init+0x58a/0x6fe\n[    0.000000][    C0] [\u003cffffffff8683d396\u003e] mm_core_init_early+0x116/0x1e30\n[    0.000000][    C0] [\u003cffffffff86801edc\u003e] start_kernel+0xd2/0x848\n\nConvert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment\nbefore using it in VMEMMAP_ADDR_ALIGN.  This keeps the existing\nround_down() logic while making the resulting vmemmap base satisfy the\nmask-alignment requirement."
        }
      ],
      "metrics": [
        {
          "cvssV3_1": {
            "baseScore": 7.8,
            "baseSeverity": "HIGH",
            "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H",
            "version": "3.1"
          },
          "scenarios": [
            {
              "lang": "en",
              "value": "AV:L - The flaw is set during early boot in arch/riscv/mm/init.c setup_bootmem()/sparse_init(), and runtime impact is reached through local memory-management syscalls (mmap, page faults, compound folio allocation) invoking compound_head(); no network, adjacent-network, or remote protocol path exists.\nAC:L - On affected RISC-V 64 kernels with HUGETLB/HVO enabled (RISC-V defconfig) and DRAM bases such as QEMU virt where phys_ram_base is not aligned to MAX_FOLIO_NR_PAGES*PAGE_SIZE, the wrong vmemmap_start_pfn and misaligned pfn_to_page(0) occur deterministically every boot without races or attacker-uncontrollable layout.\nPR:L - The broken vmemmap alignment is established automatically at boot before any credentials exist; once running, an unprivileged local user can trigger compound folio allocation and freeing (anonymous mmap, THP, hugetlbfs) that exercise mask-based compound_head() with no capability or namespace gate.\nUI:N - No victim interaction is required beyond normal operation of an already-affected system; the attacker does not need another user to mount filesystems, open devices, or perform discretionary actions to reach the broken compound-page paths.\nS:U - Impact is kernel memory and page-metadata corruption within the host kernel security authority; it does not cross a VM, hypervisor, IOMMU/DMA, or sandbox boundary into a separate security domain.\nC:H - Misaligned pfn_to_page(0) breaks compound_info mask decoding so compound_head() can map tail struct pages to incorrect heads, enabling out-of-bounds reads of adjacent kernel page metadata and folio contents through routine MM operations (get_user_pages, compaction, isolation).\nI:H - Resolving the wrong compound head corrupts folio refcount, mapping, and LRU state and directs kernel read/write operations to unintended physical pages, providing a defensible arbitrary kernel-memory corruption primitive leveragable for privilege escalation.\nA:H - Incorrect compound_head() resolution can oops or panic the kernel during page isolation, compaction, THP, hugetlb, and I/O pin paths; sparse_init() VM_WARN_ON_ONCE on standard QEMU virt confirms the alignment violation is real on common RISC-V deployments."
            }
          ]
        }
      ],
      "providerMetadata": {
        "dateUpdated": "2026-08-29T06:22:09.064Z",
        "orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "shortName": "Linux"
      },
      "references": [
        {
          "url": "https://git.kernel.org/stable/c/11ad86830a78ea4e1942afc73c10e4ca8e69e03f"
        },
        {
          "url": "https://git.kernel.org/stable/c/45ebe4540817cb540a59e4dc04014ac5dddc9990"
        }
      ],
      "title": "riscv/mm: use physical alignment for vmemmap_start_pfn",
      "x_generator": {
        "engine": "bippy-1.2.0"
      }
    }
  },
  "cveMetadata": {
    "assignerOrgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
    "assignerShortName": "Linux",
    "cveId": "CVE-2026-80682",
    "datePublished": "2026-08-28T06:52:49.498Z",
    "dateReserved": "2026-08-26T14:34:25.784Z",
    "dateUpdated": "2026-08-29T06:22:09.064Z",
    "state": "PUBLISHED"
  },
  "dataType": "CVE_RECORD",
  "dataVersion": "5.2"
}

Sightings

Author	Source	Type	Date	Other

Nomenclature

Seen: The vulnerability was mentioned, discussed, or observed by the user.
Confirmed: The vulnerability has been validated from an analyst's perspective.
Published Proof of Concept: A public proof of concept is available for this vulnerability.
Exploited: The vulnerability was observed as exploited by the user who reported the sighting.
Patched: The vulnerability was observed as successfully patched by the user who reported the sighting.
Not exploited: The vulnerability was not observed as exploited by the user who reported the sighting.
Not confirmed: The user expressed doubt about the validity of the vulnerability.
Not patched: The vulnerability was not observed as successfully patched by the user who reported the sighting.

Detection rules are retrieved from Rulezet.

The MITRE ATT&CK techniques below are AI-generated suggestions, inferred from the description of the vulnerability by the CIRCL/vulnerability-attack-technique-classification-roberta-base model, served locally by ML-Gateway. They have not been verified by an analyst and are provided for guidance only.
The approach is described in our paper Mapping CVEs to MITRE ATT&CK Techniques: A Curated Gold-Set Classifier and the Limits of LLM-Assisted Label Expansion.

Action not permitted

GHSA-R646-7CF5-PGJC

CVE-2026-80682 (GCVE-0-2026-80682)

Tags

Sightings

Nomenclature