GHSA-4MH8-7CRP-48X9

Vulnerability from github – Published: 2025-10-07 18:31 – Updated: 2026-02-04 00:30
VLAI
Details

In the Linux kernel, the following vulnerability has been resolved:

drm/amdgpu: drop gfx_v11_0_cp_ecc_error_irq_funcs

The gfx.cp_ecc_error_irq is retired in gfx11. In gfx_v11_0_hw_fini still use amdgpu_irq_put to disable this interrupt, which caused the call trace in this function.

[ 102.873958] Call Trace: [ 102.873959] [ 102.873961] gfx_v11_0_hw_fini+0x23/0x1e0 [amdgpu] [ 102.874019] gfx_v11_0_suspend+0xe/0x20 [amdgpu] [ 102.874072] amdgpu_device_ip_suspend_phase2+0x240/0x460 [amdgpu] [ 102.874122] amdgpu_device_ip_suspend+0x3d/0x80 [amdgpu] [ 102.874172] amdgpu_device_pre_asic_reset+0xd9/0x490 [amdgpu] [ 102.874223] amdgpu_device_gpu_recover.cold+0x548/0xce6 [amdgpu] [ 102.874321] amdgpu_debugfs_reset_work+0x4c/0x70 [amdgpu] [ 102.874375] process_one_work+0x21f/0x3f0 [ 102.874377] worker_thread+0x200/0x3e0 [ 102.874378] ? process_one_work+0x3f0/0x3f0 [ 102.874379] kthread+0xfd/0x130 [ 102.874380] ? kthread_complete_and_exit+0x20/0x20 [ 102.874381] ret_from_fork+0x22/0x30

v2: - Handle umc and gfx ras cases in separated patch - Retired the gfx_v11_0_cp_ecc_error_irq_funcs in gfx11

v3: - Improve the subject and code comments - Add judgment on gfx11 in the function of amdgpu_gfx_ras_late_init

v4: - Drop the define of CP_ME1_PIPE_INST_ADDR_INTERVAL and SET_ECC_ME_PIPE_STATE which using in gfx_v11_0_set_cp_ecc_error_state - Check cp_ecc_error_irq.funcs rather than ip version for a more sustainable life

v5: - Simplify judgment conditions

Show details on source website

{
  "affected": [],
  "aliases": [
    "CVE-2023-53628"
  ],
  "database_specific": {
    "cwe_ids": [],
    "github_reviewed": false,
    "github_reviewed_at": null,
    "nvd_published_at": "2025-10-07T16:15:45Z",
    "severity": "MODERATE"
  },
  "details": "In the Linux kernel, the following vulnerability has been resolved:\n\ndrm/amdgpu: drop gfx_v11_0_cp_ecc_error_irq_funcs\n\nThe gfx.cp_ecc_error_irq is retired in gfx11. In gfx_v11_0_hw_fini still\nuse amdgpu_irq_put to disable this interrupt, which caused the call trace\nin this function.\n\n[  102.873958] Call Trace:\n[  102.873959]  \u003cTASK\u003e\n[  102.873961]  gfx_v11_0_hw_fini+0x23/0x1e0 [amdgpu]\n[  102.874019]  gfx_v11_0_suspend+0xe/0x20 [amdgpu]\n[  102.874072]  amdgpu_device_ip_suspend_phase2+0x240/0x460 [amdgpu]\n[  102.874122]  amdgpu_device_ip_suspend+0x3d/0x80 [amdgpu]\n[  102.874172]  amdgpu_device_pre_asic_reset+0xd9/0x490 [amdgpu]\n[  102.874223]  amdgpu_device_gpu_recover.cold+0x548/0xce6 [amdgpu]\n[  102.874321]  amdgpu_debugfs_reset_work+0x4c/0x70 [amdgpu]\n[  102.874375]  process_one_work+0x21f/0x3f0\n[  102.874377]  worker_thread+0x200/0x3e0\n[  102.874378]  ? process_one_work+0x3f0/0x3f0\n[  102.874379]  kthread+0xfd/0x130\n[  102.874380]  ? kthread_complete_and_exit+0x20/0x20\n[  102.874381]  ret_from_fork+0x22/0x30\n\nv2:\n- Handle umc and gfx ras cases in separated patch\n- Retired the gfx_v11_0_cp_ecc_error_irq_funcs in gfx11\n\nv3:\n- Improve the subject and code comments\n- Add judgment on gfx11 in the function of amdgpu_gfx_ras_late_init\n\nv4:\n- Drop the define of CP_ME1_PIPE_INST_ADDR_INTERVAL and\nSET_ECC_ME_PIPE_STATE which using in gfx_v11_0_set_cp_ecc_error_state\n- Check cp_ecc_error_irq.funcs rather than ip version for a more\nsustainable life\n\nv5:\n- Simplify judgment conditions",
  "id": "GHSA-4mh8-7crp-48x9",
  "modified": "2026-02-04T00:30:26Z",
  "published": "2025-10-07T18:31:09Z",
  "references": [
    {
      "type": "ADVISORY",
      "url": "https://nvd.nist.gov/vuln/detail/CVE-2023-53628"
    },
    {
      "type": "WEB",
      "url": "https://git.kernel.org/stable/c/31b07aec4a2bdcab00770ea3a18efe49734ce153"
    },
    {
      "type": "WEB",
      "url": "https://git.kernel.org/stable/c/720b47229a5b24061d1c2e29ddb6043a59178d79"
    },
    {
      "type": "WEB",
      "url": "https://git.kernel.org/stable/c/7b5a8a23acbc3ee50b23602b61db1563561faf84"
    }
  ],
  "schema_version": "1.4.0",
  "severity": [
    {
      "score": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H",
      "type": "CVSS_V3"
    }
  ]
}



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