GHSA-2RC5-GH24-QJJX
Vulnerability from github – Published: 2026-08-15 15:30 – Updated: 2026-08-19 18:32In the Linux kernel, the following vulnerability has been resolved:
gpio: pch: use raw_spinlock_t for the register lock
pch_irq_type() is registered as the irq_chip .irq_set_type callback and takes chip->spinlock with spin_lock_irqsave(). This callback is reached from __setup_irq() -> __irq_set_trigger() -> chip->irq_set_type() while the caller holds desc->lock, a raw_spinlock_t, with hardirqs disabled. That context is not sleepable, but on PREEMPT_RT a regular spinlock_t is an rtmutex-backed sleeping lock, so acquiring it there is invalid.
This was confirmed on a PREEMPT_RT kernel with lockdep (PROVE_RAW_LOCK_NESTING and DEBUG_ATOMIC_SLEEP). A grounded PoC mirrored pch_irq_type()'s locking and drove it through the real genirq carrier irq_set_irq_type() -> __irq_set_trigger() -> chip->irq_set_type(), i.e. the same __irq_set_trigger() edge that __setup_irq() takes for a requested IRQ. With the original spin_lock_irqsave() edge lockdep reported an invalid wait context, immediately followed by:
BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48 in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 95, name: insmod hardirqs last disabled at (3784): _raw_spin_lock_irqsave+0x4f/0x60 rt_spin_lock+0x3a/0x1c0 repro_irq_set_type+0x64/0xa0 [pch_repro] __irq_set_trigger+0x69/0x140 irq_set_irq_type+0x78/0xd0
Switching the mirrored lock to raw_spinlock_t made both splats go away.
Convert the register lock to raw_spinlock_t. The same lock also serializes the GPIO direction/value callbacks and the suspend/resume register save/restore, but all of those critical sections only perform MMIO register accesses (ioread32()/iowrite32()) and irq_set_handler_locked(); none of them contain sleepable operations. Keeping this register lock non-sleeping is therefore appropriate for the irqchip callbacks and does not change the GPIO-side locking contract.
This is the same class of issue and fix as recently addressed for other GPIO controllers, e.g. commit 286533cb14a3 ("gpio: sch: use raw_spinlock_t in the irq startup path") and commit 90f0109019e6 ("gpio: eic-sprd: use raw_spinlock_t in the irq startup path").
{
"affected": [],
"aliases": [
"CVE-2026-74468"
],
"database_specific": {
"cwe_ids": [],
"github_reviewed": false,
"github_reviewed_at": null,
"nvd_published_at": "2026-08-15T13:17:51Z",
"severity": null
},
"details": "In the Linux kernel, the following vulnerability has been resolved:\n\ngpio: pch: use raw_spinlock_t for the register lock\n\npch_irq_type() is registered as the irq_chip .irq_set_type callback and\ntakes chip-\u003espinlock with spin_lock_irqsave(). This callback is reached\nfrom __setup_irq() -\u003e __irq_set_trigger() -\u003e chip-\u003eirq_set_type() while\nthe caller holds desc-\u003elock, a raw_spinlock_t, with hardirqs disabled.\nThat context is not sleepable, but on PREEMPT_RT a regular spinlock_t is\nan rtmutex-backed sleeping lock, so acquiring it there is invalid.\n\nThis was confirmed on a PREEMPT_RT kernel with lockdep\n(PROVE_RAW_LOCK_NESTING and DEBUG_ATOMIC_SLEEP). A grounded PoC mirrored\npch_irq_type()\u0027s locking and drove it through the real genirq carrier\nirq_set_irq_type() -\u003e __irq_set_trigger() -\u003e chip-\u003eirq_set_type(), i.e.\nthe same __irq_set_trigger() edge that __setup_irq() takes for a\nrequested IRQ. With the original spin_lock_irqsave() edge lockdep\nreported an invalid wait context, immediately followed by:\n\n BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48\n in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 95, name: insmod\n hardirqs last disabled at (3784): _raw_spin_lock_irqsave+0x4f/0x60\n rt_spin_lock+0x3a/0x1c0\n repro_irq_set_type+0x64/0xa0 [pch_repro]\n __irq_set_trigger+0x69/0x140\n irq_set_irq_type+0x78/0xd0\n\nSwitching the mirrored lock to raw_spinlock_t made both splats go away.\n\nConvert the register lock to raw_spinlock_t. The same lock also\nserializes the GPIO direction/value callbacks and the suspend/resume\nregister save/restore, but all of those critical sections only perform\nMMIO register accesses (ioread32()/iowrite32()) and\nirq_set_handler_locked(); none of them contain sleepable operations.\nKeeping this register lock non-sleeping is therefore appropriate for the\nirqchip callbacks and does not change the GPIO-side locking contract.\n\nThis is the same class of issue and fix as recently addressed for other\nGPIO controllers, e.g. commit 286533cb14a3 (\"gpio: sch: use raw_spinlock_t\nin the irq startup path\") and commit 90f0109019e6 (\"gpio: eic-sprd: use\nraw_spinlock_t in the irq startup path\").",
"id": "GHSA-2rc5-gh24-qjjx",
"modified": "2026-08-19T18:32:28Z",
"published": "2026-08-15T15:30:33Z",
"references": [
{
"type": "ADVISORY",
"url": "https://nvd.nist.gov/vuln/detail/CVE-2026-74468"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/16da33cb36e663b6967112185e11d00ce8ff957c"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/466ab0c41d5f54f71cee60619d07c4abd0ffd2cd"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/935e6872db7faecfbe1a10b3f5d97a62fdff5ec9"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/98f292cb6d01487d17988d9fd4e19c13e7adb156"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/a02b8950d619123da64f69b70fe1dadef217dfe4"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/c0a4ec89fc26e4b679b04f1002c503cb2529acdc"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/efc76a3f5353dd33a2e2ad48200cd4a18de30a0d"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/ff050589a21967883bb55f6dba42568f8367ad4a"
}
],
"schema_version": "1.4.0",
"severity": []
}
Sightings
| Author | Source | Type | Date | Other |
|---|
Nomenclature
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