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CVE-2025-40058 (GCVE-0-2025-40058)

Vulnerability from cvelistv5 – Published: 2025-10-28 11:48 – Updated: 2026-08-05 12:07
VLAI
Title
iommu/vt-d: Disallow dirty tracking if incoherent page walk
Summary
In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Disallow dirty tracking if incoherent page walk Dirty page tracking relies on the IOMMU atomically updating the dirty bit in the paging-structure entry. For this operation to succeed, the paging- structure memory must be coherent between the IOMMU and the CPU. In another word, if the iommu page walk is incoherent, dirty page tracking doesn't work. The Intel VT-d specification, Section 3.10 "Snoop Behavior" states: "Remapping hardware encountering the need to atomically update A/EA/D bits in a paging-structure entry that is not snooped will result in a non- recoverable fault." To prevent an IOMMU from being incorrectly configured for dirty page tracking when it is operating in an incoherent mode, mark SSADS as supported only when both ecap_slads and ecap_smpwc are supported.
Severity
8.8 (High)
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H
Assigner
References
Impacted products
Vendor Product Version CPE status
Linux Linux Affected: f35f22cc760eb2c7034bf53251399685d611e03f , < ebe16d245a00626bb87163862a1b07daf5475a3e (git)
Affected: f35f22cc760eb2c7034bf53251399685d611e03f , < 8d096ce0e87bdc361f0b25d7943543bc53aa0b9e (git)
Affected: f35f22cc760eb2c7034bf53251399685d611e03f , < 57f55048e564dedd8a4546d018e29d6bbfff0a7e (git)
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Linux Linux Affected: 6.7
Unaffected: 0 , < 6.7 (semver)
Unaffected: 6.12.53 , ≤ 6.12.* (semver)
Unaffected: 6.17.3 , ≤ 6.17.* (semver)
Unaffected: 6.18 , ≤ * (original_commit_for_fix)
guessed Create a notification for this product.
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{
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          "product": "Linux",
          "programFiles": [
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          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\niommu/vt-d: Disallow dirty tracking if incoherent page walk\n\nDirty page tracking relies on the IOMMU atomically updating the dirty bit\nin the paging-structure entry. For this operation to succeed, the paging-\nstructure memory must be coherent between the IOMMU and the CPU. In\nanother word, if the iommu page walk is incoherent, dirty page tracking\ndoesn\u0027t work.\n\nThe Intel VT-d specification, Section 3.10 \"Snoop Behavior\" states:\n\n\"Remapping hardware encountering the need to atomically update A/EA/D bits\n in a paging-structure entry that is not snooped will result in a non-\n recoverable fault.\"\n\nTo prevent an IOMMU from being incorrectly configured for dirty page\ntracking when it is operating in an incoherent mode, mark SSADS as\nsupported only when both ecap_slads and ecap_smpwc are supported."
        }
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            "baseSeverity": "HIGH",
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              "value": "AV:L - The vulnerable configuration is reached only through local ioctls on /dev/iommu (IOMMU_HWPT_ALLOC with IOMMU_HWPT_ALLOC_DIRTY_TRACKING, then IOMMU_HWPT_SET_DIRTY_TRACKING) against a bound VFIO device fd. There is no network-facing path into the VT-d dirty-tracking code.\nAC:L - On an affected IOMMU the attacker deterministically allocates the dirty-tracking hwpt and enables SSADE with two ioctls \u2014 no race to win and no memory layout to groom. Where the IOMMU is emulated for a guest, the ecap_slads=1/ecap_smpwc=0 combination is itself under attacker or hypervisor control.\nPR:L - Access to /dev/iommu plus a VFIO device fd is required, which in standard device-assignment deployments is delegated to the unprivileged VMM user (qemu/libvirt) rather than requiring real root. A compromised VMM process or a user in a device-assignment group can drive the entire sequence.\nUI:N - The full sequence \u2014 hwpt allocation, dirty-tracking enable, and the subsequent device DMA \u2014 is driven entirely by the attacker\u0027s own process and the device it already controls. No victim action is needed.\nS:C - The defect is in the IOMMU\u0027s own DMA-isolation enforcement: SSADE is programmed on hardware that cannot coherently update paging-structure entries, and the unflushed cached RMW in intel_iommu_read_and_clear_dirty() can resurrect stale second-stage PTEs. An assigned device\u0027s DMA then reaches memory outside its authorized translation, crossing the IOMMU security boundary.\nC:H - Stale or incorrectly-updated second-stage paging entries leave a device-visible mapping to host pages that have been unmapped and potentially reassigned, giving the controlled device DMA reads of arbitrary host memory. Dirty-bitmap results are also unreliable, leaking incorrect state across a migration boundary.\nI:H - The same stale-translation window gives the assigned device DMA writes into host memory outside its mapping \u2014 an arbitrary write primitive from the device side that defeats IOMMU containment. Silently missed dirty pages additionally corrupt guest memory state on live migration.\nA:H - The VT-d specification mandates a non-recoverable fault whenever the hardware must atomically update A/EA/D bits in a non-snooped paging-structure entry, so the assigned device\u0027s DMA is blocked outright and the DMAR fault handler is driven repeatedly. The device and any VM depending on it are rendered inoperable."
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    "datePublished": "2025-10-28T11:48:31.567Z",
    "dateReserved": "2025-04-16T07:20:57.158Z",
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            "value": "In the Linux kernel, the following vulnerability has been resolved:\n\niommu/vt-d: Disallow dirty tracking if incoherent page walk\n\nDirty page tracking relies on the IOMMU atomically updating the dirty bit\nin the paging-structure entry. For this operation to succeed, the paging-\nstructure memory must be coherent between the IOMMU and the CPU. In\nanother word, if the iommu page walk is incoherent, dirty page tracking\ndoesn\u0027t work.\n\nThe Intel VT-d specification, Section 3.10 \"Snoop Behavior\" states:\n\n\"Remapping hardware encountering the need to atomically update A/EA/D bits\n in a paging-structure entry that is not snooped will result in a non-\n recoverable fault.\"\n\nTo prevent an IOMMU from being incorrectly configured for dirty page\ntracking when it is operating in an incoherent mode, mark SSADS as\nsupported only when both ecap_slads and ecap_smpwc are supported."
          }
        ],
        "id": "CVE-2025-40058",
        "lastModified": "2026-07-30T06:24:08.750",
        "metrics": {
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      "current_release_date": "2026-07-30T08:52:55+00:00",
      "cve": "CVE-2025-40058",
      "id": "CVE-2025-40058",
      "initial_release_date": "2025-10-28T00:00:00+00:00",
      "product_status:fixed": "612",
      "product_status:known_affected": "22",
      "product_status:known_not_affected": "90",
      "source": "Red Hat CSAF VEX",
      "status": "final",
      "title": "kernel: iommu/vt-d: Disallow dirty tracking if incoherent page walk",
      "url": "https://security.access.redhat.com/data/csaf/v2/vex/2025/cve-2025-40058.json",
      "version": "3"
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}



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Forecast uses a logistic model when the trend is rising, or an exponential decay model when the trend is falling. Fitted via linearized least squares.

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Nomenclature

  • Seen: The vulnerability was mentioned, discussed, or observed by the user.
  • Confirmed: The vulnerability has been validated from an analyst's perspective.
  • Published Proof of Concept: A public proof of concept is available for this vulnerability.
  • Exploited: The vulnerability was observed as exploited by the user who reported the sighting.
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  • Not exploited: The vulnerability was not observed as exploited by the user who reported the sighting.
  • Not confirmed: The user expressed doubt about the validity of the vulnerability.
  • Not patched: The vulnerability was not observed as successfully patched by the user who reported the sighting.


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Vulnerabilities whose description is nearest to this one in the vector space of the CIRCL/vulnerability-attack-technique-biencoder model. This is a similarity search over the bi-encoder space (plain cosine), not a classification, and it has no measured accuracy.