Common Weakness Enumeration
CWE-190
AllowedInteger Overflow or Wraparound
Abstraction: Base · Status: Stable
The product performs a calculation that can produce an integer overflow or wraparound when the logic assumes that the resulting value will always be larger than the original value. This occurs when an integer value is incremented to a value that is too large to store in the associated representation. When this occurs, the value may become a very small or negative number.
3869 vulnerabilities reference this CWE, most recent first.
CVE-2024-4453 (GCVE-0-2024-4453)
Vulnerability from cvelistv5 – Published: 2024-05-22 19:18 – Updated: 2025-02-13 17:53
VLAI
EPSS
VEX
Title
GStreamer EXIF Metadata Parsing Integer Overflow Remote Code Execution Vulnerability
Summary
GStreamer EXIF Metadata Parsing Integer Overflow Remote Code Execution Vulnerability. This vulnerability allows remote attackers to execute arbitrary code on affected installations of GStreamer. Interaction with this library is required to exploit this vulnerability but attack vectors may vary depending on the implementation.
The specific flaw exists within the parsing of EXIF metadata. The issue results from the lack of proper validation of user-supplied data, which can result in an integer overflow before allocating a buffer. An attacker can leverage this vulnerability to execute code in the context of the current process.
. Was ZDI-CAN-23896.
Severity
7.8 (High)
SSVC
Exploitation: none
Automatable: no
Technical Impact: total
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
3 references
| URL | Tags |
|---|---|
| https://www.zerodayinitiative.com/advisories/ZDI-… | x_research-advisory |
| https://gitlab.freedesktop.org/tpm/gstreamer/-/co… | vendor-advisory |
| https://lists.debian.org/debian-lts-announce/2024… |
Impacted products
Date Public
2024-05-17 23:23
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CVE-2024-3757 (GCVE-0-2024-3757)
Vulnerability from cvelistv5 – Published: 2024-05-07 06:27 – Updated: 2024-08-01 20:20
VLAI
EPSS
VEX
Title
Arkcompiler runtime has an integer overflow vulnerability
Summary
in OpenHarmony v4.0.0 and prior versions allow a local attacker cause service crash through integer overflow.
Severity
SSVC
Exploitation: none
Automatable: no
Technical Impact: partial
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
1 reference
Impacted products
1 product
| Vendor | Product | Version | |
|---|---|---|---|
| OpenHarmony | OpenHarmony |
Affected:
v4.0.0 , < v4.0.1
(custom)
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CVE-2024-3077 (GCVE-0-2024-3077)
Vulnerability from cvelistv5 – Published: 2024-03-29 05:06 – Updated: 2024-08-01 19:32
VLAI
EPSS
VEX
Title
Bluetooth: integer underflow in gatt_find_info_rsp
Summary
An malicious BLE device can crash BLE victim device by sending malformed gatt packet
Severity
6.8 (Medium)
SSVC
Exploitation: none
Automatable: no
Technical Impact: partial
CISA Coordinator (v2.0.3)
Assigner
References
1 reference
Impacted products
1 product
| Vendor | Product | Version | |
|---|---|---|---|
| zephyrproject-rtos | Zephyr |
Affected:
* , ≤ 3.6
(git)
|
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CVE-2024-2452 (GCVE-0-2024-2452)
Vulnerability from cvelistv5 – Published: 2024-03-26 15:43 – Updated: 2025-02-13 17:40
VLAI
EPSS
VEX
Title
Integer wraparound, under-allocation, and heap buffer overflow in Eclipse ThreadX NetX Duo __portable_aligned_alloc()
Summary
In Eclipse ThreadX NetX Duo before 6.4.0, if an attacker can control
parameters of __portable_aligned_alloc() could cause an integer
wrap-around and an allocation smaller than expected. This could cause
subsequent heap buffer overflows.
Severity
SSVC
Exploitation: none
Automatable: no
Technical Impact: partial
CISA Coordinator (v2.0.3)
CWE
Assigner
References
Impacted products
1 product
| Vendor | Product | Version | |
|---|---|---|---|
| Eclipse Foundation | ThreadX |
Affected:
0 , < 6.4.0
(semver)
|
Credits
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CVE-2024-2212 (GCVE-0-2024-2212)
Vulnerability from cvelistv5 – Published: 2024-03-26 15:58 – Updated: 2025-02-13 17:33
VLAI
EPSS
VEX
Title
Integer wraparounds, under-allocations, and heap buffer overflows in Eclipse ThreadX xQueueCreate() and xQueueCreateSet()
Summary
In Eclipse ThreadX before 6.4.0, xQueueCreate() and xQueueCreateSet()
functions from the FreeRTOS compatibility API
(utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c) were missing
parameter checks. This could lead to integer wraparound,
under-allocations and heap buffer overflows.
Severity
7.3 (High)
SSVC
Exploitation: none
Automatable: no
Technical Impact: total
CISA Coordinator (v2.0.3)
Assigner
References
Impacted products
2 products
| Vendor | Product | Version | |
|---|---|---|---|
| Eclipse Foundation | ThreadX |
Affected:
0 , < 6.4.0
(semver)
|
|
| eclipse_foundation | threadx |
Affected:
0 , < 6.4.0
(semver)
cpe:2.3:a:eclipse_foundation:threadx:*:*:*:*:*:*:*:* |
Credits
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CVE-2024-1917 (GCVE-0-2024-1917)
Vulnerability from cvelistv5 – Published: 2024-03-15 00:02 – Updated: 2024-08-27 19:58
VLAI
EPSS
VEX
Summary
Integer Overflow or Wraparound vulnerability in Mitsubishi Electric Corporation MELSEC-Q Series and MELSEC-L Series CPU modules allows a remote unauthenticated attacker to execute malicious code on a target product by sending a specially crafted packet.
Severity
9.8 (Critical)
SSVC
Exploitation: none
Automatable: yes
Technical Impact: total
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
3 references
| URL | Tags |
|---|---|
| https://www.mitsubishielectric.com/en/psirt/vulne… | vendor-advisory |
| https://jvn.jp/vu/JVNVU99690199/ | government-resource |
| https://www.cisa.gov/news-events/ics-advisories/i… | government-resource |
Impacted products
51 products
| Vendor | Product | Version | |
|---|---|---|---|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q03UDECPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q04UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q06UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q10UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q13UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q20UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q26UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q50UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q100UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q03UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q04UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q06UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q13UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q26UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q04UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q06UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q13UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q26UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L02CPU |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L06CPU |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L02CPU-P |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L06CPU-P |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU-P |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU-BT |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU-PBT |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| mitsubishielectric | melsec_q-q03udecpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q03udecpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q04udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q04udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q06udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q06udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q10udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q10udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q13udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q13udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q20udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q20udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q26udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q26udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q50udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q50udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q100udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q100udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q03udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q03udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q04udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q04udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q06udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q06udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q13udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q13udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q26udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q26udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q06udpvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q06udpvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q13udpvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q13udpvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q26udpvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q26udpvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | l02cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:l02cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_l06cpu\(-p\) |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishi:melsec_l06cpu\(-p\):-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_l26cpu\(-p\) |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishi:melsec_l26cpu\(-p\):-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l02cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l02cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l06cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l06cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l26cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l26cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | l26cpu-bt |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:l26cpu-bt:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l26cpu-pbt |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l26cpu-pbt:-:*:*:*:*:*:*:* |
Date Public
2024-03-14 03:00
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"status": "affected",
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CVE-2024-1916 (GCVE-0-2024-1916)
Vulnerability from cvelistv5 – Published: 2024-03-15 00:01 – Updated: 2024-08-27 19:57
VLAI
EPSS
VEX
Summary
Integer Overflow or Wraparound vulnerability in Mitsubishi Electric Corporation MELSEC-Q Series and MELSEC-L Series CPU modules allows a remote unauthenticated attacker to execute malicious code on a target product by sending a specially crafted packet.
Severity
9.8 (Critical)
SSVC
Exploitation: none
Automatable: yes
Technical Impact: total
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
3 references
| URL | Tags |
|---|---|
| https://www.mitsubishielectric.com/en/psirt/vulne… | vendor-advisory |
| https://jvn.jp/vu/JVNVU99690199/ | government-resource |
| https://www.cisa.gov/news-events/ics-advisories/i… | government-resource |
Impacted products
51 products
| Vendor | Product | Version | |
|---|---|---|---|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q03UDECPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q04UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q06UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q10UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q13UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q20UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q26UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q50UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q100UDEHCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q03UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q04UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q06UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q13UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q26UDVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q04UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q06UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q13UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-Q Series Q26UDPVCPU |
Affected:
The first 5 digits of serial No. "26061" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L02CPU |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L06CPU |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L02CPU-P |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L06CPU-P |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU-P |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU-BT |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| Mitsubishi Electric Corporation | MELSEC-L Series L26CPU-PBT |
Affected:
The first 5 digits of serial No. "26041" and prior
|
|
| mitsubishielectric | melsec_q-q03udecpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q03udecpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q04udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q04udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q06udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q06udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q10udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q10udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q13udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q13udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q20udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q20udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q26udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q26udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q50udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q50udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_q-q100udehcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishielectric:melsec_q-q100udehcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q03udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q03udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q04udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q04udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q06udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q06udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q13udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q13udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q26udvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q26udvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q06udpvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q06udpvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q13udpvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q13udpvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_q26udpvcpu |
Affected:
0 , < xxxxx26061
(custom)
cpe:2.3:h:mitsubishi:melsec_q26udpvcpu:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | l02cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:l02cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_l06cpu\(-p\) |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishi:melsec_l06cpu\(-p\):-:*:*:*:*:*:*:* |
|
| mitsubishi | melsec_l26cpu\(-p\) |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishi:melsec_l26cpu\(-p\):-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l02cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l02cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l06cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l06cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l26cpu-p |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l26cpu-p:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | l26cpu-bt |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:l26cpu-bt:-:*:*:*:*:*:*:* |
|
| mitsubishielectric | melsec_l26cpu-pbt |
Affected:
0 , < xxxxx26041
(custom)
cpe:2.3:h:mitsubishielectric:melsec_l26cpu-pbt:-:*:*:*:*:*:*:* |
Date Public
2024-03-14 03:00
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CVE-2024-1633 (GCVE-0-2024-1633)
Vulnerability from cvelistv5 – Published: 2024-02-19 16:42 – Updated: 2024-08-01 18:48
VLAI
EPSS
VEX
Title
FIP Header Integer Overflow
Summary
During the secure boot, bl2 (the second stage of
the bootloader) loops over images defined in the table “bl2_mem_params_descs”.
For each image, the bl2 reads the image length and destination from the image’s
certificate. Because of the way of reading from the image, which base on 32-bit unsigned integer value, it can result to an integer overflow. An attacker can bypass memory range restriction and write data out of buffer bounds, which could result in bypass of secure boot.
Affected git version from c2f286820471ed276c57e603762bd831873e5a17 until (not
Severity
SSVC
Exploitation: none
Automatable: no
Technical Impact: partial
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
1 reference
Impacted products
1 product
| Vendor | Product | Version | |
|---|---|---|---|
| Renesas | rcar_gen3_v2.5 |
Affected:
v2.5
|
Credits
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CVE-2024-1580 (GCVE-0-2024-1580)
Vulnerability from cvelistv5 – Published: 2024-02-19 10:34 – Updated: 2025-02-13 17:32
VLAI
EPSS
VEX
Title
Integer overflow in VideoLAN dav1d
Summary
An integer overflow in dav1d AV1 decoder that can occur when decoding videos with large frame size. This can lead to memory corruption within the AV1 decoder. We recommend upgrading past version 1.4.0 of dav1d.
Severity
5.9 (Medium)
SSVC
Exploitation: none
Automatable: no
Technical Impact: partial
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
15 references
Date Public
2024-02-15 11:00
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CVE-2024-1305 (GCVE-0-2024-1305)
Vulnerability from cvelistv5 – Published: 2024-07-08 17:27 – Updated: 2024-08-23 03:55
VLAI
EPSS
VEX
Summary
tap-windows6 driver version 9.26 and earlier does not properly
check the size data of incomming write operations which an attacker can
use to overflow memory buffers, resulting in a bug check and potentially
arbitrary code execution in kernel space
Severity
9.8 (Critical)
SSVC
Exploitation: none
Automatable: yes
Technical Impact: total
CISA Coordinator (v2.0.3)
CWE
- CWE-190 - Integer Overflow or Wraparound
Assigner
References
Impacted products
4 products
| Vendor | Product | Version | |
|---|---|---|---|
| OpenVPN | tap-windows6 |
Affected:
9.26 or earlier
|
|
| OpenVPN | OpenVPN-GUI |
Affected:
2.6.9 and earlier
|
|
| openvpn | openvpn_gui |
Affected:
0 , ≤ 2.6.9
(custom)
cpe:2.3:a:openvpn:openvpn_gui:*:*:*:*:*:*:*:* |
|
| openvpn | tap_windows6 |
Affected:
0 , ≤ 9.26
(custom)
cpe:2.3:a:openvpn:tap_windows6:*:*:*:*:*:*:*:* |
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Mitigation
Requirements
Ensure that all protocols are strictly defined, such that all out-of-bounds behavior can be identified simply, and require strict conformance to the protocol.
Mitigation MIT-3
Requirements
Strategy: Language Selection
- Use a language that does not allow this weakness to occur or provides constructs that make this weakness easier to avoid.
- If possible, choose a language or compiler that performs automatic bounds checking.
Mitigation MIT-4
Architecture and Design
Strategy: Libraries or Frameworks
- Use a vetted library or framework that does not allow this weakness to occur or provides constructs that make this weakness easier to avoid [REF-1482].
- Use libraries or frameworks that make it easier to handle numbers without unexpected consequences.
- Examples include safe integer handling packages such as SafeInt (C++) or IntegerLib (C or C++). [REF-106]
Mitigation MIT-8
Implementation
Strategy: Input Validation
- Perform input validation on any numeric input by ensuring that it is within the expected range. Enforce that the input meets both the minimum and maximum requirements for the expected range.
- Use unsigned integers where possible. This makes it easier to perform validation for integer overflows. When signed integers are required, ensure that the range check includes minimum values as well as maximum values.
Mitigation MIT-36
Implementation
- Understand the programming language's underlying representation and how it interacts with numeric calculation (CWE-681). Pay close attention to byte size discrepancies, precision, signed/unsigned distinctions, truncation, conversion and casting between types, "not-a-number" calculations, and how the language handles numbers that are too large or too small for its underlying representation. [REF-7]
- Also be careful to account for 32-bit, 64-bit, and other potential differences that may affect the numeric representation.
Mitigation MIT-15
Architecture and Design
For any security checks that are performed on the client side, ensure that these checks are duplicated on the server side, in order to avoid CWE-602. Attackers can bypass the client-side checks by modifying values after the checks have been performed, or by changing the client to remove the client-side checks entirely. Then, these modified values would be submitted to the server.
Mitigation MIT-26
Implementation
Strategy: Compilation or Build Hardening
Examine compiler warnings closely and eliminate problems with potential security implications, such as signed / unsigned mismatch in memory operations, or use of uninitialized variables. Even if the weakness is rarely exploitable, a single failure may lead to the compromise of the entire system.
CAPEC-92: Forced Integer Overflow
This attack forces an integer variable to go out of range. The integer variable is often used as an offset such as size of memory allocation or similarly. The attacker would typically control the value of such variable and try to get it out of range. For instance the integer in question is incremented past the maximum possible value, it may wrap to become a very small, or negative number, therefore providing a very incorrect value which can lead to unexpected behavior. At worst the attacker can execute arbitrary code.