CVE-2026-23438 (GCVE-0-2026-23438)

Vulnerability from cvelistv5 – Published: 2026-04-03 15:15 – Updated: 2026-04-18 08:58
VLAI?
Title
net: mvpp2: guard flow control update with global_tx_fc in buffer switching
Summary
In the Linux kernel, the following vulnerability has been resolved: net: mvpp2: guard flow control update with global_tx_fc in buffer switching mvpp2_bm_switch_buffers() unconditionally calls mvpp2_bm_pool_update_priv_fc() when switching between per-cpu and shared buffer pool modes. This function programs CM3 flow control registers via mvpp2_cm3_read()/mvpp2_cm3_write(), which dereference priv->cm3_base without any NULL check. When the CM3 SRAM resource is not present in the device tree (the third reg entry added by commit 60523583b07c ("dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree")), priv->cm3_base remains NULL and priv->global_tx_fc is false. Any operation that triggers mvpp2_bm_switch_buffers(), for example an MTU change that crosses the jumbo frame threshold, will crash: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 Mem abort info: ESR = 0x0000000096000006 EC = 0x25: DABT (current EL), IL = 32 bits pc : readl+0x0/0x18 lr : mvpp2_cm3_read.isra.0+0x14/0x20 Call trace: readl+0x0/0x18 mvpp2_bm_pool_update_fc+0x40/0x12c mvpp2_bm_pool_update_priv_fc+0x94/0xd8 mvpp2_bm_switch_buffers.isra.0+0x80/0x1c0 mvpp2_change_mtu+0x140/0x380 __dev_set_mtu+0x1c/0x38 dev_set_mtu_ext+0x78/0x118 dev_set_mtu+0x48/0xa8 dev_ifsioc+0x21c/0x43c dev_ioctl+0x2d8/0x42c sock_ioctl+0x314/0x378 Every other flow control call site in the driver already guards hardware access with either priv->global_tx_fc or port->tx_fc. mvpp2_bm_switch_buffers() is the only place that omits this check. Add the missing priv->global_tx_fc guard to both the disable and re-enable calls in mvpp2_bm_switch_buffers(), consistent with the rest of the driver.
Severity ?
No CVSS data available.
Assigner
Impacted products
Vendor Product Version
Linux Linux Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < 0cfcd31f98fc608dc9406bff3fee3a9dd364d014 (git)
Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < da089f74a993f846685067b14158cb41b879ff29 (git)
Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < ff0c54f088f7ab91dbbf47cf8244460f99122750 (git)
Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < 7bd20f4b3ef3044dc55acd5b8ef748a70d29d03f (git)
Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < 7df2b50cae1a76cbb90b294f3edb61e3e10bf2e9 (git)
Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < 8baced53a35fc9710f80d6ca016a2c418dc3231f (git)
Affected: 3a616b92a9d17448d96a33bf58e69f01457fd43a , < 8a63baadf08453f66eb582fdb6dd234f72024723 (git)
Create a notification for this product.
    Linux Linux Affected: 5.12
Unaffected: 0 , < 5.12 (semver)
Unaffected: 5.15.203 , ≤ 5.15.* (semver)
Unaffected: 6.1.167 , ≤ 6.1.* (semver)
Unaffected: 6.6.130 , ≤ 6.6.* (semver)
Unaffected: 6.12.78 , ≤ 6.12.* (semver)
Unaffected: 6.18.20 , ≤ 6.18.* (semver)
Unaffected: 6.19.10 , ≤ 6.19.* (semver)
Unaffected: 7.0 , ≤ * (original_commit_for_fix)
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Show details on NVD website

{
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          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nnet: mvpp2: guard flow control update with global_tx_fc in buffer switching\n\nmvpp2_bm_switch_buffers() unconditionally calls\nmvpp2_bm_pool_update_priv_fc() when switching between per-cpu and\nshared buffer pool modes. This function programs CM3 flow control\nregisters via mvpp2_cm3_read()/mvpp2_cm3_write(), which dereference\npriv-\u003ecm3_base without any NULL check.\n\nWhen the CM3 SRAM resource is not present in the device tree (the\nthird reg entry added by commit 60523583b07c (\"dts: marvell: add CM3\nSRAM memory to cp11x ethernet device tree\")), priv-\u003ecm3_base remains\nNULL and priv-\u003eglobal_tx_fc is false. Any operation that triggers\nmvpp2_bm_switch_buffers(), for example an MTU change that crosses\nthe jumbo frame threshold, will crash:\n\n  Unable to handle kernel NULL pointer dereference at\n  virtual address 0000000000000000\n  Mem abort info:\n    ESR = 0x0000000096000006\n    EC = 0x25: DABT (current EL), IL = 32 bits\n  pc : readl+0x0/0x18\n  lr : mvpp2_cm3_read.isra.0+0x14/0x20\n  Call trace:\n   readl+0x0/0x18\n   mvpp2_bm_pool_update_fc+0x40/0x12c\n   mvpp2_bm_pool_update_priv_fc+0x94/0xd8\n   mvpp2_bm_switch_buffers.isra.0+0x80/0x1c0\n   mvpp2_change_mtu+0x140/0x380\n   __dev_set_mtu+0x1c/0x38\n   dev_set_mtu_ext+0x78/0x118\n   dev_set_mtu+0x48/0xa8\n   dev_ifsioc+0x21c/0x43c\n   dev_ioctl+0x2d8/0x42c\n   sock_ioctl+0x314/0x378\n\nEvery other flow control call site in the driver already guards\nhardware access with either priv-\u003eglobal_tx_fc or port-\u003etx_fc.\nmvpp2_bm_switch_buffers() is the only place that omits this check.\n\nAdd the missing priv-\u003eglobal_tx_fc guard to both the disable and\nre-enable calls in mvpp2_bm_switch_buffers(), consistent with the\nrest of the driver."
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    "dateReserved": "2026-01-13T15:37:46.017Z",
    "dateUpdated": "2026-04-18T08:58:54.130Z",
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This function programs CM3 flow control\\nregisters via mvpp2_cm3_read()/mvpp2_cm3_write(), which dereference\\npriv-\u003ecm3_base without any NULL check.\\n\\nWhen the CM3 SRAM resource is not present in the device tree (the\\nthird reg entry added by commit 60523583b07c (\\\"dts: marvell: add CM3\\nSRAM memory to cp11x ethernet device tree\\\")), priv-\u003ecm3_base remains\\nNULL and priv-\u003eglobal_tx_fc is false. Any operation that triggers\\nmvpp2_bm_switch_buffers(), for example an MTU change that crosses\\nthe jumbo frame threshold, will crash:\\n\\n  Unable to handle kernel NULL pointer dereference at\\n  virtual address 0000000000000000\\n  Mem abort info:\\n    ESR = 0x0000000096000006\\n    EC = 0x25: DABT (current EL), IL = 32 bits\\n  pc : readl+0x0/0x18\\n  lr : mvpp2_cm3_read.isra.0+0x14/0x20\\n  Call trace:\\n   readl+0x0/0x18\\n   mvpp2_bm_pool_update_fc+0x40/0x12c\\n   mvpp2_bm_pool_update_priv_fc+0x94/0xd8\\n   mvpp2_bm_switch_buffers.isra.0+0x80/0x1c0\\n   mvpp2_change_mtu+0x140/0x380\\n   __dev_set_mtu+0x1c/0x38\\n   dev_set_mtu_ext+0x78/0x118\\n   dev_set_mtu+0x48/0xa8\\n   dev_ifsioc+0x21c/0x43c\\n   dev_ioctl+0x2d8/0x42c\\n   sock_ioctl+0x314/0x378\\n\\nEvery other flow control call site in the driver already guards\\nhardware access with either priv-\u003eglobal_tx_fc or port-\u003etx_fc.\\nmvpp2_bm_switch_buffers() is the only place that omits this check.\\n\\nAdd the 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  }
}


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