<?xml version='1.0' encoding='UTF-8'?>
<?xml-stylesheet href="/static/style.xsl" type="text/xsl"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
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  <updated>2026-11-05T18:58:26.375028+00:00</updated>
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  </author>
  <link href="https://db.gcve.eu" rel="alternate"/>
  <generator uri="https://lkiesow.github.io/python-feedgen" version="1.0.0">python-feedgen</generator>
  <subtitle>Contains only the most 10 recent entries.</subtitle>
  <entry>
    <id>https://db.gcve.eu/vuln/cve-2026-99259</id>
    <title>CVE-2026-99259 — soc/tegra: pmc: Fix uninitialised clock rate</title>
    <updated>2026-11-05T18:58:26.375891+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p><strong>Affected:</strong> Linux</p>
<p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>soc/tegra: pmc: Fix uninitialised clock rate</p>
<p>For legacy 32-bit Tegra devices, the warning in the
tegra_pmc_enter_suspend_mode() function is being triggered because the
early_pmc-&gt;rate variable is never configured and hence, always 0. This
issue started occurring after updating the PMC driver to create the PMC
context dynamically which causes the 'rate' to be set in the new dynamic
context, but missed updating the rate in the early PMC context.</p>
<p>Fix this by initialising the early_pmc-&gt;rate variable for 32-bit Tegra
devices when the rate for the PMC context is initialised.</p>
<p>[treding@nvidia.com: move assignment to existing #ifdef block]</p></div>
    </content>
    <link href="https://db.gcve.eu/vuln/cve-2026-99259"/>
  </entry>
</feed>
