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  <updated>2026-11-03T20:53:17.768630+00:00</updated>
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  <entry>
    <id>https://db.gcve.eu/vuln/cve-2026-98639</id>
    <title>CVE-2026-98639 — KVM: riscv: Fix NACL hfence entry update order</title>
    <updated>2026-11-03T20:53:17.769559+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p><strong>Affected:</strong> Linux</p>
<p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>KVM: riscv: Fix NACL hfence entry update order</p>
<p>The SBI v3.0 specification (section 15.1.2) requires a nested HFENCE
entry to be populated as follows:
1) find an unused entry with Config.Pending == 0
2) update the Page_Number and Page_Count words
3) update the Config word with Config.Pending set</p>
<p>__kvm_riscv_nacl_hfence() writes the Config word first, so the SBI
implementation (or NACL hardware) can observe a pending entry with
pnum/pcount values left over from the previous use of that entry,
resulting in incorrect TLB flush ranges.</p>
<p>Write pnum and pcount first and the Config word last. Since the
consumer is an external agent on coherent shared memory, use
WRITE_ONCE() to stop the compiler from reordering the stores and
smp_wmb() to make the parameter words globally visible before the
Pending bit is set.</p></div>
    </content>
    <link href="https://db.gcve.eu/vuln/cve-2026-98639"/>
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