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  <updated>2026-10-03T06:45:59.095134+00:00</updated>
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  <entry>
    <id>https://db.gcve.eu/vuln/cve-2026-53056</id>
    <title>CVE-2026-53056 — drm/msm/dpu: fix mismatch between power and frequency</title>
    <updated>2026-10-03T06:45:59.098075+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p><strong>Affected:</strong> Linux</p>
<p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>drm/msm/dpu: fix mismatch between power and frequency</p>
<p>During DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops
the MMCX rail to MIN_SVS while the core clock frequency remains at its
original (highest) rate. When runtime resume re-enables the clock, this
may result in a mismatch between the rail voltage and the clock rate.</p>
<p>For example, in the DPU bind path, the sequence could be:
  cpu0: dev_sync_state -&gt; rpmhpd_sync_state
  cpu1:                                     dpu_kms_hw_init
timeline 0 ------------------------------------------------&gt; t</p>
<p>After rpmhpd_sync_state, the voltage performance is no longer guaranteed
to stay at the highest level. During dpu_kms_hw_init, calling
dev_pm_opp_set_rate(dev, 0) drops the voltage, causing the MMCX rail to
fall to MIN_SVS while the core clock is still at its maximum frequency.
When the power is re-enabled, only the clock is enabled, leading to a
situation where the MMCX rail is at MIN_SVS but the core clock is at its
highest rate. In this state, the rail cannot sustain the clock rate,
which may cause instability or system crash.</p>
<p>Remove the call to dev_pm_opp_set_rate(dev, 0) from dpu_runtime_suspend
to ensure the correct vote is restored when DPU resumes.</p>
<p>Patchwork: https://patchwork.freedesktop.org/patch/710077/</p></div>
    </content>
    <link href="https://db.gcve.eu/vuln/cve-2026-53056"/>
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