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  <id>https://db.gcve.eu/rss/recent/all/10</id>
  <title>Most recent entries from all</title>
  <updated>2026-10-25T21:46:50.497863+00:00</updated>
  <author>
    <name>Vulnerability-Lookup</name>
    <email>info@gcve.eu</email>
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  <entry>
    <id>https://db.gcve.eu/vuln/fkie_cve-2026-99082</id>
    <title>fkie_cve-2026-99082</title>
    <updated>2026-10-25T21:46:50.521826+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>KVM: x86: Use active memslots for the per-vCPU MMIO cache</p>
<p>KVM tags the per-vCPU MMIO cache with a memslot generation so that a
memslot update invalidates cached MMIO information.  Both the fill and
validation paths use kvm_memslots(), which unconditionally selects address
space 0, even when the vCPU is running in SMM and using address space 1.</p>
<p>Commit 56f17dd3fbc4 ("kvm: x86: fix stale mmio cache bug") added the
memslot generation to the cache key so that a memslot update could not
leave a stale entry valid.  When commit 699023e23965 ("KVM: x86: add SMM
to the MMU role, support SMRAM address space") added the SMM address space,
these helpers were not converted to use the active memslots.</p>
<p>Consequently, an update to the SMM memslots can leave an entry from the old
SMM address space apparently valid after the vCPU returns to the normal
address space.  A guest can then cause an access to valid RAM at the same
GFN to be returned to userspace as KVM_EXIT_MMIO.</p>
<p>Completing that exit through the VMM's RAM address space writes the backing
page without going through KVM's write-tracking path.  If the page backs a
nested EPT table, KVM can continue using shadow translations derived from
the old contents.  The WARN_ON_ONCE() in kvm_mmu_write_protect_fault()
catches this invalid cache and memslot combination.</p>
<p>Use the vCPU's active memslots when caching and validating the entry.
Memslot generations are unique across a…</p></div>
    </content>
    <link href="https://db.gcve.eu/vuln/fkie_cve-2026-99082"/>
  </entry>
  <entry>
    <id>https://db.gcve.eu/vuln/ghsa-58r9-ch9w-px7w</id>
    <title>GHSA-58r9-ch9w-px7w</title>
    <updated>2026-10-25T21:46:50.521921+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>KVM: x86: Use active memslots for the per-vCPU MMIO cache</p>
<p>KVM tags the per-vCPU MMIO cache with a memslot generation so that a
memslot update invalidates cached MMIO information.  Both the fill and
validation paths use kvm_memslots(), which unconditionally selects address
space 0, even when the vCPU is running in SMM and using address space 1.</p>
<p>Commit 56f17dd3fbc4 ("kvm: x86: fix stale mmio cache bug") added the
memslot generation to the cache key so that a memslot update could not
leave a stale entry valid.  When commit 699023e23965 ("KVM: x86: add SMM
to the MMU role, support SMRAM address space") added the SMM address space,
these helpers were not converted to use the active memslots.</p>
<p>Consequently, an update to the SMM memslots can leave an entry from the old
SMM address space apparently valid after the vCPU returns to the normal
address space.  A guest can then cause an access to valid RAM at the same
GFN to be returned to userspace as KVM_EXIT_MMIO.</p>
<p>Completing that exit through the VMM's RAM address space writes the backing
page without going through KVM's write-tracking path.  If the page backs a
nested EPT table, KVM can continue using shadow translations derived from
the old contents.  The WARN_ON_ONCE() in kvm_mmu_write_protect_fault()
catches this invalid cache and memslot combination.</p>
<p>Use the vCPU's active memslots when caching and validating the entry.
Memslot generations are unique across a…</p></div>
    </content>
    <link href="https://db.gcve.eu/vuln/ghsa-58r9-ch9w-px7w"/>
  </entry>
  <entry>
    <id>https://db.gcve.eu/vuln/msrc_cve-2026-99082</id>
    <title>msrc_CVE-2026-99082 — KVM: x86: Use active memslots for the per-vCPU MMIO cache</title>
    <updated>2026-10-25T21:46:50.521959+00:00</updated>
    <content>msrc_CVE-2026-99082</content>
    <link href="https://db.gcve.eu/vuln/msrc_cve-2026-99082"/>
  </entry>
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