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The GPU has  \nan unused 4K area of the register BAR space into which you can  \nremap registers.  We remap the HDP flush registers into this  \nspace to allow userspace (CPU or GPU) to flush the HDP when it  \nupdates VRAM.  However, on systems with &gt;4K pages, we end up  \nexposing PAGE_SIZE of MMIO space. \nSeverity: 0.0 | NA \nVisit the link for more details, such as CVSS details, affected products, timeline, and more...\",\n  \"Detection Date\": \"18 Jul 2024\",\n  \"Type\": \"Vulnerability\"\n}\n\ud83d\udd39 t.me/cvedetector \ud83d\udd39", "url": "https://t.me/cvedetector/1142"}, {"timestamp": "2024-08-01T00:00:00Z", "date_only": true, "value": "2024-08-01", "kind": "milestone", "label": "Published", "source": "certfr_avis \u00b7 CERTFR-2024-AVI-0667", "record": "CERTFR-2024-AVI-0667", "field": "vendor_advisories.2.published_at"}, {"timestamp": "2024-08-02T00:00:00Z", "date_only": true, "value": "2024-08-02", "kind": "milestone", "label": "Published", "source": "certfr_avis \u00b7 CERTFR-2024-AVI-0667", "record": "CERTFR-2024-AVI-0667", "field": "vendor_advisories.0.published_at"}, {"timestamp": "2024-08-02T00:00:00Z", "date_only": true, "value": "2024-08-02", "kind": "milestone", "label": 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